VeriSilicon: The "Chip Dynasty" and the Global Battle for Silicon-Platform-as-a-Service

I. Introduction & Episode Roadmap

Picture a conference room in Mountain View sometime around 2023. An internet giant you have heard of — maybe a hyperscaler, maybe a carmaker — has just decided it is tired of paying NVIDIA's margins and tired of waiting in line behind everyone else for the same off-the-shelf accelerators. The decision is made: we will design our own chip. A custom piece of silicon, tuned exactly to our workload, that no competitor can buy.

Then the room goes quiet, because someone asks the obvious question. How? Designing a leading-edge chip is not a weekend project. It means hundreds of specialized engineers who know how to lay out transistors at 4 nanometers. It means licensing graphics, video, and AI processor blocks from a dozen vendors and stitching them together. It means a relationship with TSMC or Samsung good enough to get foundry capacity at all. It means packaging, testing, yield management, and a supply chain that can deliver millions of physical units without a single fatal defect. The all-in cost of a single advanced tape-out — the moment you commit a design to the photomasks that print it — can exceed fifty million dollars before you have sold one chip.¹⁵

Building all of that in-house would take years and a billion dollars. So who do these companies call instead?

Increasingly, the answer is a Shanghai-headquartered company most consumers have never heard of: 芯原股份 VeriSilicon Microelectronics, trading in Shanghai under the ticker 688521. By the firm's own accounting it ranks as the seventh-largest semiconductor IP licensor in the world and the largest in Mainland China.¹ Its intellectual property and its design teams sit inside chips that have shipped in the billions, across products from American technology platforms to Chinese electric vehicles.

Here is the paradox that makes VeriSilicon worth three hours of your attention. It is a semiconductor company at genuine scale — and yet it has never sold a single chip under its own brand. It designs the silicon, manufactures the silicon through partner foundries, and hands the finished product to the customer, whose logo, not VeriSilicon's, goes on the box. VeriSilicon calls this model 芯片平台即服务 Silicon Platform as a Service, or SiPaaS: it is, in effect, the neutral arms dealer of the custom-chip arms race, selling picks and shovels to every prospector while refusing to stake a claim of its own.¹

That neutrality is either the smartest structural choice in the industry or a permanent trap that condemns the company to thin margins between powerful buyers and powerful suppliers. By the end of this episode you should be able to argue both sides convincingly. Here is where we are going:

• The Berkeley roots and the remarkable Dai family — three Shanghai-born siblings who seeded a genuine semiconductor dynasty spanning Silicon Valley, Singapore, and Shanghai.
• The SiPaaS business model itself, and why it is genuinely different from ARM, from Broadcom, and from a traditional ASIC house.
• Two bargain-basement acquisitions — the ZSP DSP unit in 2006 and Vivante in 2015 — that built the company's IP arsenal for a fraction of what comparable assets cost elsewhere.
• The financials, where a company sitting on record orders keeps posting net losses, and the structural question of whether and when that ends.
• The "A+H" capital-markets strategy and the April 2026 Hong Kong listing filing.
• The technology future: chiplets, the UCIe interconnect standard, the automotive-safety moat, and the geopolitical fault lines running underneath all of it.

Let's start, as these stories so often do, in Shanghai.

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II. The "Chip Dynasty" & Berkeley Roots: The Dai Family Story

Every great semiconductor saga has a migration in it. For the Dai family, the migration ran from Shanghai to Berkeley, and it produced not one founder but three.

In the late 1970s and early 1980s, as China reopened to the world, three siblings — 戴伟民 Wayne Wei-Ming Dai, 戴伟进 Wei-Jin Dai, and 戴伟立 Weili Dai — made their way to the United States. All three landed at the University of California, Berkeley, and all three steeped themselves in the disciplines that would define the next forty years of their lives: computer science, electrical engineering, and the mathematics of designing things made of silicon.¹⁰ It is hard to overstate how unusual this is. Plenty of immigrant families produce one technologist who makes good. The Dais produced a cluster of them, and the companies they founded would eventually do business with one another in ways that are central to this story — and that raise governance questions we will not shy away from.

The most famous of the three, for a long time, was the sister. 戴伟立 Weili Dai co-founded Marvell Technology Group in 1995 alongside her husband, Sehat Sutardja, and his brother. Marvell became one of the defining fabless chip companies of the storage and connectivity era — the silicon inside hard-disk drive controllers, Wi-Fi, and Ethernet, eventually a company worth tens of billions of dollars. Weili Dai became, for years, one of the very few women to have co-founded a major semiconductor company. Her shadow over this family narrative is long, and she will reappear at three separate hinge points: as a customer, as a related party, and finally as the founder of a chiplet-packaging venture that may shape VeriSilicon's next decade.

But our protagonist is the eldest brother, 戴伟民 Wayne Dai. Wayne did not start as an entrepreneur; he started as an academic. He became a tenured associate professor of computer engineering at the University of California, Santa Cruz, where his specialty was about as deep in the plumbing of chip-making as you can go: Electronic Design Automation, or EDA — the software tools that let engineers design circuits too complex for any human to lay out by hand, and physical design, the art of arranging billions of transistors so that signals actually arrive where and when they should.¹⁰

This matters enormously for understanding everything that follows. Wayne Dai's expertise was never in marketing a chip or owning a product category. It was in the process of turning an idea into manufacturable silicon. He was, by training and temperament, an infrastructure person — someone who thinks about how the sausage gets made rather than what flavor to sell.

In 1995 he made the academic-to-entrepreneur leap, founding a company called Ultima Interconnect Technology to commercialize EDA tools for the interconnect problem — the wiring that had become the real bottleneck as chips grew denser. Ultima later merged with a firm called Celestry, and in 2002 the combined entity was acquired by Cadence Design Systems, one of the two giants of the EDA world, in a deal reported at over one hundred million dollars.¹⁰ That exit did two things for Wayne Dai. It gave him capital and credibility. And it confirmed his instinct that the most durable money in semiconductors is often made not by the people fighting over end markets, but by the people who sell the tools and platforms everyone else depends on.

So when Wayne Dai founded VeriSilicon in 2001 — first establishing roots that would center on Shanghai's 张江高科技园区 Zhangjiang High-Tech Park, the dense semiconductor cluster that functions as China's answer to a chip-focused Silicon Valley — he was not trying to build the next Marvell. He had watched his sister win that game, and he chose deliberately not to play it.

His vision was the inverse of a product company. Rather than design a chip, fight for market share, and risk everything on whether consumers wanted it, he wanted to build the platform that lowered the barrier to entry for everybody else who wanted to design a chip. Be the company that every aspiring chip designer needs and none of them fears as a competitor. It was a contrarian bet at a time when the prestige and the venture money all flowed toward branded product companies. Whether contrarian-and-right or contrarian-and-stuck is the question this episode keeps returning to.

In the early years, that vision had to survive contact with a much harder reality — because the business VeriSilicon could actually sell in 2001 was not yet a high-margin platform at all. It was something far more humble, and far less scalable. That gap, and how Wayne Dai closed it, is the next chapter.

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III. The Early Pivot & The ZSP Acquisition

In its first five years, VeriSilicon made its living doing something deeply unglamorous: physical design services. A client would arrive with a chip concept and VeriSilicon's engineers would do the painstaking work of turning it into a manufacturable layout — placing the blocks, routing the wires, closing timing, preparing the design for the foundry. It is skilled, valuable work. It is also, in business-model terms, a trap.

Here is why. A pure services business scales linearly with headcount. To double revenue, you roughly have to double the number of engineers. There is no operating leverage — no point at which the work you did yesterday keeps paying you tomorrow. Each project is a fresh sale, each hour is billed once, and the margins are forever capped by what the market will pay for an engineer-hour. Wayne Dai, who had just sold an EDA company to Cadence for nine figures precisely because software IP scales beautifully, understood the contrast better than almost anyone. To escape the services trap, VeriSilicon needed to own proprietary intellectual property — designs it could license over and over to many customers, collecting a fee each time without rebuilding the work.

The opportunity arrived in 2006, and it came wrapped in another company's strategic retreat.

The asset was ZSP, a family of Digital Signal Processor cores. To translate the jargon: a DSP is a specialized brain optimized for processing real-world signals — audio, voice, video — fast and at low power. It is the chip that lets your phone compress your voice for a call or decode a song. The ZSP architecture had its own winding history. LSI Logic had acquired it years earlier and tried to push it as a licensable standard to challenge the established DSP leaders, Texas Instruments and CEVA. The strategy never quite caught fire, and by the mid-2000s LSI had decided to refocus on its core storage business and divest the DSP unit.⁵

On July 6, 2006, VeriSilicon announced it had agreed to acquire the assets of LSI's ZSP unit — the cores, the development tools, the application-specific products, the software, and crucially the patents — for approximately thirteen million dollars in cash and stock.⁵ To fund it, the still-young company raised a $14.8 million Series C round from the venture firms Austin Ventures and Sierra Ventures.⁵ It took on the ZSP engineering team essentially whole.

Sit with that number for a moment, because the capital discipline is the whole point. Thirteen million dollars bought VeriSilicon a complete, battle-tested processor architecture with an existing patent portfolio and designs already shipping in millions of mobile, audio, and voice-over-IP devices. Roughly the price LSI itself had paid for the underlying architecture years earlier — VeriSilicon was, in effect, buying an established IP standard at close to its historical cost rather than at a strategic premium. Compare that to how the market valued pure-play DSP IP at the time: a specialist like CEVA traded at a multiple of several times revenue. VeriSilicon acquired a comparable category of asset for a number that looks, in hindsight, like a rounding error.

The "why it mattered" is the birth of the model that defines the company to this day. With ZSP in-house, VeriSilicon could finally offer customers a choice rather than just labor. A client could license the ZSP core outright and pay a high-margin fee for the privilege. Or the client could ask VeriSilicon to use that core to design a complete System-on-Chip — and VeriSilicon would then collect a royalty on every unit the customer shipped. Suddenly the company had two new revenue streams that did not scale linearly with headcount: one-time license fees and recurring per-chip royalties. The services business now had an IP flywheel bolted onto it. The seed of SiPaaS had been planted.

One acquisition, however, does not make an IP powerhouse. A DSP processes signals, but it cannot draw a pixel or run a neural network. For VeriSilicon to become the full-stack platform Wayne Dai envisioned, it needed graphics and vision. And as it happened, the technology it needed was being built a few miles away in California — by Wayne's own brother.

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IV. The Vivante Acquisition: The All-in-the-Family Masterstroke

If the ZSP deal was disciplined capital allocation, the Vivante deal was something more unusual: a piece of corporate strategy executed inside a single family, with all the brilliance and all the awkwardness that implies.

The middle brother, 戴伟进 Wei-Jin Dai, had built his own company in California: 图原 Vivante Corporation. Vivante's specialty was GPU IP — graphics processor designs — but aimed not at gaming PCs or data centers, where the giants fought, but at the low-power edge: mobile devices, the emerging Internet of Things, and early automotive dashboards. Vivante's graphics cores found their way into a wide range of embedded systems, including early electric-vehicle instrument clusters. By the company's disclosures it had shipped its IP in more than 300 million units across some 50-plus licensees.[^5]

The trouble was the neighborhood Vivante had to fight in. The mobile-GPU market in the early 2010s was brutal, dominated by Imagination Technologies' PowerVR (the graphics inside the iPhone for years) and ARM's Mali. Vivante had genuinely good technology but lacked the scale to win that war outright, and a meaningful share of its license revenue came from a single customer — Marvell, the company co-founded by sister Weili Dai.[^5] That concentration created exactly the kind of related-party tangle that makes auditors and outside investors nervous: revenue flowing from one sibling's company through another's, with a third sibling's firm circling as the eventual acquirer.

In October 2015, VeriSilicon announced it would acquire Vivante in an all-stock transaction.[^5] The two companies — both private at the time — declined to disclose the price publicly, saying only that their combined revenue as of the end of 2014 had exceeded $180 million.[^5] The transaction value of roughly $57.5 million surfaced later through VeriSilicon's registration and listing disclosures.⁶

Now run the valuation math the way a skeptical analyst would, because it is striking. If the combined entity did over $180 million in revenue and VeriSilicon's standalone business made up the bulk of it, Vivante's own revenue was plausibly somewhere in the $30–50 million range. A roughly $57.5 million all-stock price against that implies a multiple of about 1.1 to 1.9 times trailing revenue. Against what comparable IP assets fetched at the time, that is extraordinarily cheap. The public IP and EDA leaders — ARM, Synopsys, Cadence — traded at something like five to twelve times revenue in that era, and even a focused specialist like CEVA traded in the four-to-six-times range. VeriSilicon acquired a premier GPU and vision-processing IP portfolio at a fraction of the going rate.

Why so cheap? Because this was, in the most literal sense, an all-in-the-family deal. The buyer was the eldest brother's company. The seller was the middle brother's company. The largest customer, and a backer, traced to the sister's company. When the people on both sides of a negotiation share a surname and a Berkeley alumni network, the usual auction dynamics that bid up prices simply do not apply. That is genuinely value-accretive for VeriSilicon's shareholders — and it is also precisely the sort of related-party transaction a governance-minded investor flags, because the same dynamics that produce a great price can also produce a price that was never tested against an arm's-length market. Both things are true at once, and an honest analysis holds them together rather than choosing the flattering one.

Here is the part that turned a cheap deal into a foundational one. Vivante's graphics technology was not left as a graphics business. VeriSilicon's engineers recognized that the parallel-math machinery inside a GPU — thousands of small arithmetic units crunching numbers at once — is structurally very close to what a neural network needs. They rebuilt and re-architected the Vivante GPU IP into a Neural Processing Unit, or NPU: a dedicated AI accelerator.¹ That NPU became, over the following decade, VeriSilicon's crown jewel. The company says its NPU IP has been designed into well over 100 AI chips, spanning smart-home devices, wearables, security cameras, and automotive driver-assistance systems.¹ A bargain GPU acquisition, bought from a brother in a soft market, became the company's ticket into the edge-AI explosion that nobody in 2015 had fully priced in.

With DSP, GPU, and NPU now in the arsenal — and video, image, and display processing alongside them — VeriSilicon finally had the full set of processing engines to design a complete chip in-house. The question now becomes: how does all of this actually turn into revenue, and why is the resulting business simultaneously so large and so stubbornly unprofitable?

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V. The SiPaaS Engine: How VeriSilicon Actually Works and Makes Money

To understand VeriSilicon's business, start with the thing it refuses to do. It does not sell branded chips. Ever.

That sounds like a limitation. It is actually the strategic core. Consider the companies VeriSilicon is often compared to — Broadcom, Marvell — the giants of custom ASIC design. They will happily design a custom chip for a hyperscaler. But they also sell their own branded silicon into the market. Which means that when a potential customer hands them a confidential roadmap, that customer is handing sensitive plans to a company that may, in an adjacent product line, be a direct competitor. There is an inherent conflict of interest baked into the relationship.

VeriSilicon's pitch is the elimination of that conflict. "We never sell our own chips" is not a tagline; it is the entire reason a nervous customer can share its most sensitive specifications.¹ VeriSilicon is a pure outsourced engineering platform — the trusted, neutral workshop. We will return to this idea in the powers analysis, because it is the company's single most important structural advantage. For now, hold onto the mechanism: neutrality is the product.

Now, how does that neutrality convert into money? VeriSilicon's revenue splits into two segments with radically different economics, and understanding the split is essential to understanding the whole investment debate.

The first segment is Semiconductor IP Licensing Services. Historically this has been roughly a third of revenue, and it is gorgeous business. Gross margins run in the mid-to-high 80s and above.¹ It comes in two flavors. License fees are one-time payments a customer makes to access VeriSilicon's IP library — its GPU, NPU, video processor, DSP, image signal processor, and display blocks. Royalties are the recurring gold: a per-unit payment every time a customer ships a chip containing VeriSilicon IP. License fees are lumpy and depend on signing new customers; royalties compound quietly for years as a customer's product sells. This is the closest thing VeriSilicon has to the software-like economics Wayne Dai chased from the beginning.

The second segment is One-Stop Chip Customization Services — historically the larger share, around two-thirds of revenue, and a very different animal.¹ It has two sub-parts. Chip design, the non-recurring engineering work where VeriSilicon's engineers physically design a customer's chip down to the layout and shepherd it through tape-out, carries moderate gross margins — think the 20-to-30 percent range. Then there is mass production, the turnkey manufacturing service: VeriSilicon manages the entire supply chain, acts as the customer's intermediary with foundries like TSMC, 中芯国际 SMIC, and Samsung, handles packaging and testing, and delivers finished physical chips. This is high-volume but low-margin work — gross margins down in the 10-to-15 percent range, because here VeriSilicon is essentially a sophisticated middleman buying foundry capacity and reselling finished silicon.

So why on earth would a high-margin IP company want a low-margin manufacturing business bolted to it? This is the flywheel, and it is the heart of the model. Mass production is not where the profit is — it is where the volume is, and volume feeds the royalty engine. When VeriSilicon designs a customer's chip and then mass-produces it, every one of those units can carry IP royalties. A custom chip that succeeds in the market sends VeriSilicon two streams at once: low-margin but enormous turnkey production revenue, and high-margin royalties that compound for the life of the product. The cheap business pulls the expensive business along behind it.

That is the bull-case mechanism. The bear-case mechanism is the mirror image, and we will get there: if mass production grows faster than royalties, the blended gross margin gets worse even as revenue explodes — which is precisely what has been happening.

One more piece, and it is the technical moat. Designing a chip at an advanced process node is brutally hard, and very few independent platforms anywhere in the world can do it. VeriSilicon is one of them. The company has disclosed that a large majority of its chip-design revenue — well over two-thirds — comes from process nodes at 7 nanometers and below, including active design work at 5, 4, and even 3 nanometers.¹ In layman's terms, the "nanometer" number describes how small and densely packed the transistors are; smaller means faster and more power-efficient, but also exponentially harder and more expensive to design correctly. The number of companies on Earth that can reliably tape out a working 4nm or 3nm design is tiny. That capability is a genuine barrier to entry, and it explains why customers will tolerate being a middleman's customer: there are very few other doors to knock on.

Which brings us to the single biggest shift in how advanced chips are being built — a shift that plays directly to VeriSilicon's strengths and may be its most important growth story of all.

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VI. The Chiplet Wave: The "Hidden" Growth Engine

For fifty years, the semiconductor industry built chips the way you might bake a cake: one big monolithic slab, everything integrated onto a single piece of silicon. Moore's Law made that slab cheaper and denser every couple of years, and life was good.

That era is ending, and the reason is money. As nodes shrink toward the atomic limit, the cost of designing and manufacturing one giant monolithic die has gone vertical. A single advanced tape-out can run tens of millions of dollars, and yields fall as dies get bigger — one defect can ruin an enormous, expensive chip.¹⁵ The industry's answer is to stop baking one giant cake and start assembling a plate of smaller, specialized pieces. These pieces are called chiplets: multiple smaller dies, each doing one job, packaged together onto a single substrate so they behave like one chip.

The analogy that works: instead of building a mansion as one impossible monolithic casting, you prefabricate rooms — a kitchen module, a bedroom module — each built in the factory best suited to it, then snap them together on site. A chiplet design might pair a cheap, mature-node die for input/output functions with an ultra-advanced 4nm chiplet doing the heavy AI computation. You only pay the eye-watering advanced-node cost for the part that actually needs it.

The catch is the "snapping together." For chiplets from different sources to talk to each other, they need a common high-speed interconnect standard — the equivalent of a universal plug. That standard is UCIe, Universal Chiplet Interconnect Express, and it is being shepherded by an industry consortium of the biggest names in computing. VeriSilicon's positioning here is notable: it was the first Mainland Chinese company to join the UCIe consortium, putting it inside the room where the standard is defined rather than waiting outside to adopt it.¹

Here is where VeriSilicon's whole history pays off. The company is reframing its strategy from "IP as software code" to "IP as a chiplet." Instead of only licensing its six processor families as design files a customer must integrate, VeriSilicon is commercializing them as physical, modular silicon blocks — ready-made chiplets a customer can drop into a UCIe-based design. Its NPU, GPU, and video engines become not just licensable code but purchasable hardware modules. For a company that already owns all six processor categories and can design at the bleeding edge, this is a natural and potentially very lucrative extension.

It also reconnects the family. Recall sister 戴伟立 Weili Dai. After Marvell, she and Sehat Sutardja founded Silicon Box, a Singapore-based startup that opened a roughly two-billion-dollar advanced chiplet-packaging facility, betting that the future of chips is exactly this modular, panel-level assembly.¹¹ You can see the shape of an end-to-end family-adjacent stack: VeriSilicon designs the chiplets, and a packaging specialist like Silicon Box assembles them. The strategic logic is clean — and the related-party question raised by the Vivante deal hangs over it just as clearly. VeriSilicon has also pursued collaborations such as work on ultra-low-power, open AI platforms in the orbit of Google's Coral ecosystem, extending the chiplet-and-edge-AI story outward.¹

Now, is any of this real, or is it a slide-deck future? The materiality check is the most important sentence in this section. As of 2026, AI-related demand — the data-center ASICs and chiplet-based architectures at the center of this wave — accounted for the overwhelming majority of VeriSilicon's record new orders. Of the RMB 8.24 billion in new orders the company had signed year-to-date as of late April 2026, AI-computing-related orders made up 91.37 percent.² This is not a speculative R&D hobby; it is where the actual order book is pointing. Whether VeriSilicon can convert that order book into profit, rather than just revenue, is the question the competition and the financials will decide.

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VII. Global Competition & Industry Structure

To understand VeriSilicon's competitive position, you have to look at two different battlefields, because the company fights on both.

The first is the semiconductor IP licensing market — the business of selling reusable chip designs. According to the industry tracker IPnest, this is a textbook oligopoly. ARM sits atop it with roughly 41 percent of the market, the undisputed king of the CPU instruction set that runs nearly every phone on Earth. Synopsys follows at around 21 percent, dominant in interface and analog IP and a titan of EDA software. Cadence holds around 6 percent. And VeriSilicon ranks seventh globally with something on the order of 3 percent.⁹ By revenue rank that sounds modest — but within Mainland China, VeriSilicon is the clear number one IP supplier.¹⁹

A 3 percent global share could read as "also-ran." The more interesting framing is what kind of IP each player owns. ARM owns the CPU. Synopsys and Cadence own the interfaces, the analog, and the design tools. VeriSilicon's distinctive claim is full-stack ownership of all six processing engines that handle visual and AI workloads: GPU, NPU, video processor, DSP, image signal processor, and display.¹ That means when a customer wants a complete, unified vision-and-AI platform, VeriSilicon can design the whole thing in-house without paying third-party licensing fees to a rival on every block. The competitors are wider; VeriSilicon is, in its chosen lane, deeper.

The second battlefield is custom ASIC design and turnkey manufacturing — the one-stop business. Here the relevant rivals are not ARM but the Asian ASIC specialists: Faraday Technology (智原), affiliated with the foundry UMC; Global Unichip, or GUC (创意电子), which is closely tied to TSMC; and Alchip (世芯), another high-performance ASIC house deeply oriented toward TSMC's leading edge. These companies are formidable, and GUC and Alchip in particular have ridden the AI-ASIC boom hard.

VeriSilicon's structural difference from that group is foundry-agnosticism. GUC and Alchip are, by design and affiliation, heavily bound to TSMC. VeriSilicon works across TSMC, SMIC, Samsung, and GlobalFoundries.¹ In a calm world, tight foundry alignment is an advantage — privileged capacity, early access to new nodes. But the world is not calm. In an era of supply-chain fragmentation and export controls, the ability to route a design to whichever foundry is available and permitted is a genuine form of flexibility. It is also, viewed from the other direction, a symptom of VeriSilicon's central vulnerability: it owns no fab and therefore depends entirely on others for the physical silicon, which gives those foundry partners real leverage. That tension — flexibility versus dependence — is exactly what a formal powers-and-forces analysis is built to weigh.

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VIII. Hamilton's 7 Powers & Porter's 5 Forces

Let's put VeriSilicon on the analytical operating table and apply two frameworks investors use to separate durable advantage from temporary luck: Hamilton Helmer's 7 Powers and Porter's Five Forces. We will be honest about where the powers are strong and where they are more aspiration than fact.

Hamilton's 7 Powers Applied to VeriSilicon

Counter-Positioning — the strongest power. This is the deepest source of VeriSilicon's moat, and it is precisely the neutrality we described earlier. The incumbent ASIC giants — Broadcom, Marvell — make most of their money selling their own branded chips. For them to credibly promise a customer "we will never compete with you" would require gutting their highest-margin product businesses. They structurally cannot copy VeriSilicon's neutrality without cannibalizing themselves. That is the textbook definition of counter-positioning: a business model the incumbent declines to imitate because imitation would damage its existing profits. It is real, and it is hard to attack.

Cornered Resource. VeriSilicon's claim here rests on the multi-generational GPU-and-NPU IP library descended from the Vivante acquisition, combined with a global engineering base the company puts at over 1,100 specialists trained in advanced-node physical design.¹ The IP is genuinely hard to replicate quickly. The engineering talent is more contestable — people can be hired away, and a rising China-US bidding war for advanced-node designers cuts both ways. Call this a moderate-to-strong power, with the IP portfolio the more durable half.

Switching Costs. High, and underappreciated. Once a carmaker or an internet giant has integrated VeriSilicon's IP into a complex SoC and relies on VeriSilicon for turnkey production, ripping that out and re-architecting around a competitor's blocks is astronomically expensive and can cost multiple years of delay in a market where being late is fatal. The deeper a customer goes into the SiPaaS model — IP plus design plus production — the more thoroughly locked in it becomes. This is a key reason the royalty stream, once established, tends to persist.

Scale Economies. Real but partial. The enormous upfront R&D cost of designing, say, a 4nm NPU is fixed; it gets amortized across however many licensing customers adopt it. The more customers, the lower the per-customer cost, which is a self-reinforcing advantage. The catch is that VeriSilicon's scale, while large in China, is dwarfed by ARM and Synopsys globally, so its R&D-amortization advantage is regional rather than absolute.

Porter's Five Forces Analysis

Threat of New Entrants — very low. Building an advanced silicon IP portfolio, earning foundry certifications, and assembling a thousand-plus advanced-node engineers takes decades and hundreds of millions of dollars. Almost nobody starts this from scratch successfully. This force strongly favors incumbents, VeriSilicon among them.

Bargaining Power of Suppliers — high. This is VeriSilicon's structural weak spot. It owns no fabrication capacity and depends on a tiny number of leading foundries — TSMC, SMIC, Samsung — for the physical silicon. When foundry capacity is tight, those suppliers hold the pricing whip, and any crunch flows straight through to VeriSilicon's mass-production revenue and margins.

Bargaining Power of Buyers — moderate to high. The very customers VeriSilicon wants most — automotive OEMs, cloud hyperscalers — bring enormous volume, and enormous volume buys negotiating leverage. That leverage squeezes the mass-production gross margin down into the low double digits. The offsetting force is the switching cost above: once a buyer is integrated and shipping, its leverage on the next chip is blunted by the cost of leaving.

The net read from both frameworks is consistent and worth stating plainly: VeriSilicon has a genuine, hard-to-copy moat on the neutrality and switching-cost dimensions, but it is structurally pinned between powerful suppliers above and powerful buyers below. That sandwich is the financial story of the company — and it is why the people running it, and the way they are paid, matter so much.

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IX. Management Credibility & The A+H Dual Listing

Start with the simplest credibility test there is: do the people running the company own it the way owners do, and have they done what they said they would?

At the top, the family network remains firmly in control of the operation if not the equity. Dr. 戴伟民 Wayne Dai remains chairman, president, and CEO — the unquestioned leader a quarter-century in. His brother 戴伟进 Wei-Jin Dai, whose Vivante became the company's AI engine, serves in a senior strategy and IP role.¹ Continuity of vision is a real asset; the same continuity, in a family-founded firm with the related-party history we have already flagged, is also something an outside investor watches closely.

On incentive alignment, VeriSilicon leans hard into an all-employee shareholding philosophy. Since its STAR Market IPO it has run multiple restricted-stock programs designed to bind technical talent to long-term performance. The 2025 Restricted Stock Incentive Plan granted over 8.11 million shares — roughly 1.54 percent of total share capital — to more than 1,100 key technical personnel, including the Dai brothers themselves.¹ In a business whose entire value is locked inside the heads of advanced-node engineers, tying that talent to the equity is defensible logic. The flip side is dilution, which we will weigh in the stress test.

The governance structure has an unusual feature worth pausing on. VeriSilicon is officially classified as having 无实际控制人 — no actual controller. No single person or entity holds absolute voting control. Ownership is genuinely dispersed across an eclectic register that has included state-backed semiconductor funds, IDG Capital, Xiaomi, and Intel Capital.¹ This cuts two ways for an investor. The optimistic read is that no controlling shareholder can ram through self-dealing. The cautious read is that "no actual controller" can also mean diffuse accountability — no single owner whose own capital is decisively on the line for every decision. Either way, the dispersed register, mixing Chinese state money with the venture arm of Intel, is itself a snapshot of the geopolitical straddle that defines the whole company.

Now the strategic shift that prompted this section. On April 1, 2026, VeriSilicon filed to list H-shares on the 香港联交所 Hong Kong Stock Exchange, with CITIC Securities and UBS as joint sponsors — formally beginning its "A+H" dual-listing era six years after the STAR Market debut.⁴ The H-share issuance is structured at no more than 10 percent of the company's enlarged share capital before any over-allotment, with an over-allotment option of up to 15 percent granted to the underwriters.⁴ The listing still requires sign-off from the China Securities Regulatory Commission, Hong Kong's Securities and Futures Commission, and the exchange itself — so it is a filing, not a closed deal.⁴

Why dual-list at all? Three reasons stand out. First, global capital access: in the fractured post-2024 geopolitical environment, a Hong Kong financing window gives VeriSilicon a route to international capital, the ability to fund overseas R&D, and a currency for hiring global talent that a purely onshore listing cannot easily provide. Second, strategic M&A: management has signaled that proceeds are earmarked in part for international acquisitions to expand the IP library — a company that grew by buying ZSP and Vivante on the cheap is telling you it intends to keep shopping. Third, valuation: a Hong Kong listing opens the door to global institutional investors who may price VeriSilicon's AI-and-chiplet positioning differently than the domestic A-share market does.

There is a credibility footnote here that a careful reader should not miss. Chinese coverage of the filing pointed out that across six years as a public company on the STAR Market, VeriSilicon raised roughly RMB 3.67 billion and paid zero dividends, all while posting losses for three consecutive years.¹² That is the uncomfortable backdrop against which this new capital raise lands — and it is the perfect setup for the stress test.

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X. The Skeptical Investor Stress Test & Bear vs. Bull Cases

Let's bring in the short-seller and the activist, because no honest analysis of this company survives without them. Then we will lay out the bull and bear cases as fairly as we can.

The Skeptical Investor Stress Test

The activist's opening line writes itself. This is a twenty-five-year-old company that has raised billions and still cannot turn a profit. And the numbers back the accusation. VeriSilicon posted a net loss of roughly RMB 605 million in 2024, a sharp widening from a loss of about RMB 296 million the year before.⁸ In 2025 the net loss narrowed but did not disappear, coming in around RMB 528 million — an improvement of about 12 percent year-over-year — even as revenue surged 35.77 percent to RMB 3.15 billion.³ The company routinely spends an enormous share of revenue on R&D; in the industrial downturn of 2024, with customer projects soft, that ratio ballooned, and management itself acknowledged the elevated R&D-to-revenue level and framed it as temporary, expected to normalize as orders converted into billable design work.⁸ The skeptic's question is blunt: a company that has been at this for a quarter-century, when exactly does the structural cash-burning stop, and why should we believe this cycle is different?

The second charge is dilution. The same all-employee shareholding philosophy that aligns talent issues new equity year after year, and the Hong Kong listing will add up to roughly another 10 percent of new shares.⁴ For a company that has never paid a dividend and raised RMB 3.67 billion onshore with little to show shareholders in returns,¹² the activist frames the equity story as a treadmill: capital keeps coming in, shares keep being created, and per-share value keeps getting diluted to fund a business that does not yet generate surplus cash.

The third charge is the margin squeeze, and it is the most analytically important. VeriSilicon's blended gross margin has drifted down from historical highs in the mid-40s to around 34 percent in 2025.³ The reason is exactly the flywheel we described in reverse: the low-margin mass-production business is scaling faster than the high-margin licensing business. In other words, the part of VeriSilicon that looks like a commodity middleman is growing faster than the part that looks like a software company. Revenue growth is real, but it is arriving in its least profitable form. The bull says this is temporary — production volume today seeds royalty streams tomorrow. The bear says it is the permanent gravitational pull of being a middleman, and the mix will never swing back far enough.

The fourth charge is geopolitical, and it is existential rather than financial. VeriSilicon's most valuable capability — designing at 7nm and below — depends on advanced foundries and on design ecosystems that run through US-influenced technology. If export controls were to force a TSMC or a Samsung to sever ties with Chinese design platforms entirely, VeriSilicon's advanced-design business could suffer structural impairment effectively overnight. This is not a margin problem you can engineer around; it is a single-point-of-failure risk that sits outside management's control. It is the reason the Hong Kong listing and the foundry-agnostic posture both exist — and it is the reason neither fully solves the problem.

The Bull Case

The bull case rests on three pillars. The first is 国产替代 — domestic substitution. China's own technology champions — 百度 Baidu, 腾讯 Tencent, 阿里巴巴 Alibaba, 字节跳动 ByteDance — and its EV makers — 蔚来 Nio, 小鹏 XPeng, 理想汽车 Li Auto — increasingly cannot or will not route their most sensitive custom-chip projects through Western ASIC houses. VeriSilicon is the most credible neutral, local, full-stack gateway to advanced silicon design that those firms have. In a bifurcating world, being the trusted domestic option is a powerful tailwind that has nothing to do with management skill and everything to do with structural position.

The second pillar is the profitability inflection. The bull points to the order book: AI-computing demand drove new orders of RMB 8.24 billion year-to-date as of late April 2026, with AI making up over 91 percent — a figure that exploded from RMB 6.6 billion to RMB 8.24 billion in a matter of days that spring as orders poured in.² On the Q1 2026 results, revenue more than doubled, up 114.47 percent year-over-year to RMB 836 million, led by mass-production revenue up nearly 220 percent.¹⁴² The argument is that the high-margin royalty streams seeded by years of historical tape-outs are finally reaching critical mass, and that the long-promised swing to net profitability is genuinely near.

The third pillar is the chiplet and UCIe moat — VeriSilicon's early-mover positioning in the modular, 3D-packaged future of chip design, which we covered in depth and which the order book now substantiates with real demand rather than slideware.

The Bear Case

The bear case is the stress test taken to its logical conclusion. VeriSilicon, in this view, is an R&D treadmill: a company that must spend essentially every dollar of operating cash flow on the next node — 5nm, then 3nm, then 2nm — simply to stand still against Synopsys and ARM, never reaching the point where R&D can be throttled back and cash harvested. And it is structurally trapped in a low-margin middleman position, squeezed between giant buyers with volume leverage and a handful of foundries with capacity leverage. In that reading, the chronic losses and the perpetual dilution are not a phase the company is about to exit; they are the steady state of the business model itself.

Both cases are coherent, and the honest position is that the next eighteen months will adjudicate between them. So what should an investor actually watch? Strip away the noise and there are essentially three things that matter. First, the blended gross margin trajectory — does it stabilize and climb back toward the 40s as royalties compound, or does the mass-production mix keep dragging it down? That single ratio is the cleanest read on whether the flywheel works as advertised. Second, the IP licensing and royalty revenue line specifically, separate from total revenue — because total revenue can double on low-margin production while the high-margin engine stalls; the royalty line is where the bull thesis lives or dies. And third, the conversion of that record AI order book into reported net profit — whether the RMB 8.24 billion in signed orders actually arrives at the bottom line, or evaporates into R&D and dilution on the way down. Watch those three, and the rest of the VeriSilicon debate largely answers itself.